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Embedded Design India - total search 28 articles sort by date sort by relevance
Simulation debugging using triple speed Ethernet testbench 2009-12-18
This application note shows how you can leverage the verification environment in the testbench provided in the Altera Triple Speed Ethernet MegaCore function to debug your system design.  
IBIS models for signal integrity simulation of SPEAr600 applications 2010-04-21
This application note is intended for hardware developers using the SPEAr600 embedded MPU in their target design. This application explains how to select the correct model from the library sp600_v13.ibs after reading the register settings or knowing the operating mode from the SPEAr600 user manual.  
IBIS models for signal integrity simulation of SPEAr3xx applications 2010-03-30
This application note is intended for hardware developers using the SPEAr3xx embedded MPU in their target design.  
Importing a SPICE NetList into TINA-TI 2010-05-07
This application note describes the procedure for importing an unencrypted SPICE netlist into TINA-TI simulation software, creating a new macromodel based on the netlist, and placing a symbol to instantiate the macromodel in a TINA-TI circuit schematic  
PCIE series Final Inch design in PCIe apps gen 2-5.0Gbps 2009-04-17
Here are measurement method applied to Final Inch designs and PCIe to help deploy systems of two PCB cards mated through electrical connectors.  
Edge Rate ERM8/ERF8 Final Inch design in PCIe apps 2009-04-09
Here are measurement method applied to Final Inch designs and PCIe to help deploy systems of two PCB cards mated through electrical connectors.  
RiseUP RU8 Final Inch design in PCIe apps 2009-03-30
Here are measurement method applied to Final Inch designs and PCIe to help deploy systems of two PCB acrds mated through electrical connectors.  
QPairs QTH-DP/QSH-DP Final Inch design in PCIe apps 2009-04-03
Here are measurement method applied to Final Inch designs and PCIe to help deploy systems of two PCB cards mated through electrical connectors.  
Wind River Workbench, on-chip debugging software 2008-10-07
Learn how to unlock the power of today's microprocessor technology through Wind River Workbench.  
PCIE series Final Inch design in PCIe apps 2009-04-16
Here are measurement methods applied to Final Inch designs and PCIe to help deploy systems of two PCB cards mated through electrical connectors.  
QPairs QTE-DP/QSE-DP Final Inch design in PCIe apps 2009-04-08
Here are measurement method applied to Final Inch designs and PCIe to help deploy systems of two PCB cards mated through electrical connectors.  
Q2 QMS/QPS Final Inch design in PCIe apps 2009-04-08
Here are measurement method applied to Final Inch designs and PCIe to help deploy systems of two PCB cards mated through electrical connectors.  
Metastability 2001-04-23
Metastability  
ECLinPS circuit performance at non-standard VIH levels 2000-12-06
ECLinPS circuit performance at non-standard VIH levels  
Guide to DisplayPort PCB layout 2009-04-28
Here are guidelines for DP lane connection for the PCB traces, vias and AC coupling capacitors.  

Power Design India - total search 31 articles
DC output errors in a fully-differential amplifier 2010-06-02
Estimating junction temperature by top surface temperature in power MOSFETs 2010-03-02
Designing power isolation filters with ferrite beads for Altera FPGAs 2009-12-29
Stability in high-speed linear LDO regulators 2009-12-09
UniFET—optimised switch for discontinuous current mode power factor correction 2009-11-03
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EE Times India - total search 805 articles
Hitachi steps up verification with Cadence Palladium TBA 2010-07-22
How to build memory management for wired/wireless nets (Part 2) 2010-07-15
COTS backplane offers 32 PCIe lanes, 3PCI slots 2010-07-08
Lattice tool targets low-cost FPGA apps 2010-07-07
Freescale runs multicore processors at 2.5GHz 2010-06-24
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