Enabling power, cost efficiency in ECUs Author: William Dees, James Eifert, Jim Nash, Stefano Pietri, Jehoda Refaeli New SoC designs are needed to integrate more logic and analogue features to lower system cost.
Please login or register with us to view this article>>
Not a registered user?
Register now to gain full access to EE Times-India!
Remember password
Forgot your password?
EE Times-India sites:
RSS Feed|Site Feedback |Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment
Copyright © 2010 eMedia Asia Ltd. All rights reserved. Reproduction in whole or in part in any form or medium without the express written permission of eMedia Asia Ltd. is prohibited. Warning: The images on this site are protected by digital watermark technology. Your use of this website is subject to, and constitutes acknowledgement and acceptance of our Terms of Use.